Flash memory devices have achieved a commercial success in an electronic industry because they are able to store data for a relatively long time even without a power supply. In addition, the flash memory devices can be erased and programmed by end users after the memory devices are installed in electronic apparatuses. These functionalities are useful in the field of electronic apparatuses such as cellular telephones, personal digital assistants (PDAs) and computer BIOS storages and in the other field where a program function is required and where a power is suddenly interrupted. The flash memory devices have an array of memory transistors or cells that are similar to what are used in the other type of memory devices. The flash memory devices may achieve a non-volatility by adding a floating gate between a control gate of each memory transistor and a substrate region. Like other memory devices, the memory transistors are arranged in rows and columns to form an array of transistors. As well known in the field of memory technologies, control gates of memory cells in each row are connected to a plurality of word lines, such that the memory cells in each row can be accessed by selecting corresponding word lines. Similarly, drain regions of the cells in each column are connected to a plurality of bit lines, such that the cells in each column can be accessed by selecting corresponding bit lines. Source regions of memory cells are connected to a common source line. In some flash memory devices, a memory cell array is divided into sectors, each of which includes an individual transistor array, to provide a flexibility for a program or erase operation.
The data stored in each memory cell indicates a binary data value “1” or “0” as widely known in the art. To perform a program, read or erase operation at a specific cell in the array, various voltages are supplied to the control gate, drain region and source region in the memory cell. Respective memory cells at intersections of bit lines and word lines can be selected to be programmed or to be read by applying the various voltages to the bit line, the word line and the common source line.
In order to program a memory cell, voltages of the control gate and the drain region of the memory cell are raised up to predetermined program voltages (e.g., 10 volts and 5 to 6 volts) and the source thereof is grounded. The voltages of the control gate and the drain region drive generation of hot electrons to form negative charges at a floating gate. The hot electrons are captured in a floating gate. This electron transmission mechanism is usually referred to as “channel hot electron (CHE)” injection. When program voltages are discharged, the negative charge of the floating gate is maintained, thereby resulting in an increase of a threshold voltage. During a read operation, the threshold voltage is used for determining whether the memory is programmed or not.
The memory cells are read by applying predetermined voltages (e.g., 4.5 volts and 1 volt) to the control gate and the drain region and applying a ground voltage to the source. A bit line current or voltage is sensed by a sense amplifier. If a cell is programmed, its threshold voltage is relatively high and the bit line current is “0” or relatively low. Meanwhile, if a cell is erased, its threshold voltage is relatively low and the bit line current is relatively high.
Differently from the programming, the flash memory device is erased by a bulk unit and every memory cell in a sector is erased at the same time. One way to erase entirely a memory sector is that predetermined voltages (e.g., −10 volts and 6 volts) are applied to every word line and a bulk region in the sector, and the drain regions and a common source line are left floating. This makes electrons tunnel from the floating gate to the source region by means of the Fowler-Nordheim tunneling, such that the negative charge is removed from a floating gate of respective memory cells in the memory sector.
Generally, the reading operation is carried out in a manner of a random access and users assign a specific address to a memory array of in a memory device to read. However, a burst read mode may be provided for the memory device. In the burst read mode, data of an entire memory array or data of memory cells connected to any word line is sequentially read out, and then the read-out data is output to the user during succeeding clock cycles. In this mode, the users need not provide addresses to the memory device because the addresses are successively generated in the memory device. Generally, the function is useful to output entire data in a memory device or data of memory cells in any row.